Co-Integration of Photonic Devices on a Silicon Photonics Platform

ABSTRACT

Disclosed are methods for co-integration of active and passive photonic devices on a planarized silicon-based photonics substrate. In one aspect, a method is disclosed that includes providing a planarized silicon-based photonics substrate comprising a silicon waveguide structure, depositing a dielectric layer over the planarized silicon-based photonics substrate, selectively etching the dielectric layer, thereby exposing at least a portion of the silicon waveguide structure, selectively etching the exposed portion of the silicon waveguide structure to form a template, using the silicon waveguide structure as a seed layer to selectively grow in the template a germanium layer that extends above the dielectric layer, and planarizing the germanium layer to form a planarized germanium layer, wherein the planarized germanium layer does not extend above the dielectric layer.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to U.S. Provisional Patent ApplicationSer. No. 61/484,064 filed May 9, 2011, the contents of which are herebyincorporated by reference.

BACKGROUND

The realization of a complete silicon based photonics platform requiresthe co-integration of advanced passive photonic devices, e.g., usingpoly-on-SOI (such as, for example, high-efficiency raised gratingcouplers, filters, polarization rotators and/or waveguides), advancedelectro-optic modulators and switches (such as, for example,semiconductor-oxide-semiconductor (SOSCAP) modulators, e.g., employingthe gate-oxide capacitance between poly and SOI, and/or p-n diodes forcarrier depletion and injection), hybrid III-V/Si lasers and amplifiersusing bonding technology, and germanium-on-silicon (Ge-on-Si) waveguidephotodetectors.

In hybrid III-V/silicon lasers and amplifiers, optical gain is achievedin a low-defect III-V layer that is first grown epitaxially on aseparate substrate and then bonded to, e.g., a SOI substrate. In orderto allow efficient evanescent coupling between the silicon layer and theIII-V layer, both layers are in close proximity, such as at a distanceless than 100 nm. Bonding of the III-V layer with thin interfaciallayers requires a flat surface with a low topography.

The co-integrated germanium-on-silicon (Ge-on-Si) waveguidephotodetectors preferably have a good performance, such as a low darkcurrent, requiring a low defect density of threading dislocations (lessthan 10⁷ per cm²); a high responsivity in the order of 1 A/W, requiringefficient optical coupling between silicon and germanium, low parasiticabsorption at the metal contacts and efficient carrier collection; and ahigh speed, e.g., in the range between 10 GHz and 40 GHz, requiring thinlayers and a small footprint.

Germanium waveguide photodetectors can, for example, be integrated witha silicon photonics platform by transferring and wafer bonding acrystalline germanium film onto a silicon based (e.g., SOI) wafer, andthen fabricating the photodetector in the transferred film. However,using a wafer bonding approach is relatively expensive and makesco-integration with other opto-electronic components difficult, inparticular the co-integration with hybrid III-V/silicon lasers,requiring bonding of III-V layers in close proximity to a siliconwaveguide.

Germanium waveguide photodetectors can also be integrated with a siliconphotonics platform by growing (e.g., epitaxially) a germanium layer ontop of a silicon waveguide and then fabricating a germaniumphotodetector. In order to enable co-integration with otheropto-electronic components and, e.g., hybrid lasers, a planar topologyis needed, requiring, for example, a thin germanium film for thephotodetectors (e.g., thinner than 300 nm). However, metal contacts ontop of such a thin film are known to cause excessive optical absorption,which detracts from the photocurrent and, as such, negatively affectsthe photodetector responsivity. These negative effects are even morepronounced in a thin germanium layer epitaxially grown on top of siliconthan for a thicker germanium layer.

SUMMARY

Disclosed are methods for integrating high-performancewaveguide-integrated photodetectors (e.g., germaniumwaveguide-integrated photodetectors) with other photonic devices on asilicon photonics platform, such as a SOI based photonics platform. Thephotonic devices may include active and/or passive devices. Alsodisclosed are high-performance waveguide-integrated photodetectorsobtained using the disclosed methods.

In one aspect, a method is disclosed that includes providing aplanarized silicon-based photonics substrate comprising a siliconwaveguide structure, depositing a dielectric layer over the planarizedsilicon-based photonics substrate, selectively etching the dielectriclayer, thereby exposing at least a portion of the silicon waveguidestructure, selectively etching the exposed portion of the siliconwaveguide structure to form a template, using the silicon waveguidestructure as a seed layer to selectively grow in the template agermanium layer that extends above the dielectric layer, and planarizingthe germanium layer to form a planarized germanium layer, wherein theplanarized germanium layer does not extend above the dielectric layer.

In some embodiments, the dielectric layer comprises an oxide layer, suchas a SiO₂ layer.

In some embodiments, the method further includes, before planarizing thegermanium layer, annealing the germanium layer.

In some embodiments, the planarized germanium layer has a thicknessbetween about 100 nm and about 500 nm.

In some embodiments, planarizing the germanium layer comprises using achemical mechanical polish to planarize the germanium layer.

In some embodiments, as a result of the template, the planarizedgermanium layer has an inverted rib shape. In these embodiments, themethod may further include forming a germanium photodetector structurecomprising the planarized germanium layer. The inverted rib shape maycomprise an optically-active region and laterally-overhanging portionson either side of the optically-active region. In some embodiments, theoptically-active region has a thickness between about 250 nm and about300 nm. In some embodiments, the method may further include providingmetal contacts in electrical contact with the laterally-overhangingportions.

In another aspect, a method is disclosed that includes providing aplanarized silicon-based photonics substrate comprising a first siliconwaveguide structure and a second silicon waveguide structure, depositinga dielectric layer over the planarized silicon-based photonicssubstrate, and selectively etching the dielectric layer, therebyexposing at least a portion of the first silicon waveguide structure andat least a portion of the second silicon waveguide structure. The methodfurther includes selectively etching the exposed portion of the firstsilicon waveguide structure to form a first template, selectivelyetching the exposed portion of the second silicon waveguide structure toform a second template, using the first silicon waveguide structure as afirst seed layer to selectively grow in the first template a firstgermanium layer that extends above the dielectric layer, and planarizingthe first germanium layer to form a first planarized germanium layer,wherein the first planarized germanium layer does not extend above thedielectric layer. The method further includes using the second siliconwaveguide structure as a seed layer to selectively grow in the secondtemplate a second germanium layer that extends above the dielectriclayer and planarizing the second germanium layer to form a secondplanarized germanium layer, wherein the planarized germanium layer doesnot extend above the dielectric layer.

In some embodiments, as a result of the first template, the firstplanarized germanium layer has an inverted rib shape. Similarly, in someembodiments, as a result of the second template, the second planarizedgermanium layer has a laterally overgrown shape. In these embodiments,the method may further include forming a first germanium photodetectorstructure comprising the first planarized germanium layer and forming asecond germanium photodetector structure comprising the secondplanarized germanium layer. The inverted rib shape may comprise anoptically-active region and laterally-overhanging portions on eitherside of the optically-active region. Further, the laterally overgrownshape may comprise an optically-active region and alaterally-overhanging portion on one side of the optically-activeregion, wherein the laterally-overhanging portion is laterally disposedfrom the second silicon waveguide structure by at least about 300 nm.

In some embodiments, the method further includes, in a single processingstep, forming contacts to the first silicon waveguide structure, thesecond silicon waveguide structure, the first germanium photodetectorstructure, and the second germanium photodetector structure.

In yet another aspect, a method is disclosed that includes providing aplanarized silicon-based photonics substrate comprising a first siliconwaveguide structure and a second silicon waveguide structure, depositinga dielectric layer over the planarized silicon-based photonicssubstrate, and selectively etching the dielectric layer, therebyexposing at least a portion of the first silicon waveguide structure.The method further includes selectively etching the exposed portion ofthe first silicon waveguide structure to form a template, using thefirst silicon waveguide structure as a seed layer to selectively grow inthe template a germanium layer that extends above the dielectric layer,and planarizing the germanium layer to form a planarized germaniumlayer, wherein the planarized germanium layer does not extend above thedielectric layer. The method still further includes forming a germaniumphotodetector structure comprising the first planarized germanium layer,bonding a III-V layer to the dielectric layer at a distance of less thanabout 100 nm from the second silicon waveguide structure, andintegrating a hybrid laser structure with the planarized silicon-basedphotonics substrate, wherein the hybrid laser structure comprises theIII-V layer.

In some embodiments, as a result of the first template, the firstplanarized germanium layer has an inverted rib shape.

In some embodiments, the method further includes, in a single processingstep, forming contacts to the first silicon waveguide structure, thesecond silicon waveguide structure, the germanium photodetectorstructure, and the hybrid laser structure.

For purposes of summarizing the disclosure and the advantages achievedover the prior art, certain objects and advantages of the disclosurehave been described herein above. Of course, it is to be understood thatnot necessarily all such objects or advantages may be achieved inaccordance with any particular embodiment of the disclosure. Thus, forexample, those skilled in the art will recognize that the disclosure maybe embodied or carried out in a manner that achieves or optimizes oneadvantage or group of advantages as taught herein without necessarilyachieving other objects or advantages as may be taught or suggestedherein. Further, it is understood that this summary is merely an exampleand is not intended to limit the scope of the disclosure as claimed. Thedisclosure, both as to organization and method of operation, togetherwith features and advantages thereof, may best be understood byreference to the following detailed description when read in conjunctionwith the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1-8 schematically illustrate process steps of an example method,in accordance with some embodiments.

FIG. 9 illustrates the integration of a hybrid III-V/silicon laser, inaccordance with some embodiments.

FIG. 10 shows a transmission electron microscopy image showing across-section of an ‘inverted rib’ germanium structure, in accordancewith some embodiments.

FIGS. 11A-11C illustrates different device configurations for an‘inverted rib’ germanium photodetector, in accordance with someembodiments.

FIGS. 12A-12B show simulation results for a typical germaniumphotodetector (12B) and for an ‘inverted rib’ germanium photodetector(12A), in accordance with some embodiments.

FIGS. 13A-13H schematically illustrate process steps of an examplemethod, in accordance with some embodiments.

FIG. 14 illustrates different device configurations for a ‘laterallyovergrown’ germanium photodetector, in accordance with some embodiments.

FIGS. 15-16 illustrate experimental results comparing a typicalgermanium waveguide-integrated photodetector with the disclosedgermanium waveguide-integrated photodetector, in accordance with someembodiments.

Any reference signs in the claims shall not be construed as limiting thescope of the present disclosure. In the different drawings, the samereference signs typically refer to the same or analogous elements,unless context dictates otherwise.

DETAILED DESCRIPTION

In the following detailed description, numerous specific details are setforth in order to provide a thorough understanding of the disclosure andhow it may be practiced in particular embodiments. However, it will beunderstood that the present disclosure may be practiced without thesespecific details. In other instances, well-known methods, procedures andtechniques have not been described in detail, so as not to obscure thepresent disclosure. While the present disclosure will be described withrespect to particular embodiments and with reference to certaindrawings, the disclosure is not limited hereto. The drawings includedand described herein are schematic and are not limiting the scope of thedisclosure. It is also noted that in the drawings, the size of someelements may be exaggerated and, therefore, not drawn to scale forillustrative purposes.

Furthermore, the terms first, second, third and the like in thedescription and in the claims, are used for distinguishing betweensimilar elements and not necessarily for describing a sequence, eithertemporally, spatially, in ranking or in any other manner. It is to beunderstood that the terms so used are interchangeable under appropriatecircumstances and that the embodiments of the disclosure describedherein are capable of operation in other sequences than described orillustrated herein.

Moreover, the terms top, bottom, over, under and the like in thedescription and the claims are used for descriptive purposes and notnecessarily for describing relative positions. It is to be understoodthat the terms so used are interchangeable under appropriatecircumstances and that the embodiments of the disclosure describedherein are capable of operation in other orientations than described orillustrated herein.

It is to be noticed that the term “comprising”, used in the claims,should not be interpreted as being restricted to the means listedthereafter; it does not exclude other elements or steps. It is thus tobe interpreted as specifying the presence of the stated features,integers, steps or components as referred to, but does not preclude thepresence or addition of one or more other features, integers, steps orcomponents, or groups thereof. Thus, the scope of the expression “adevice comprising means A and B” should not be limited to devicesconsisting only of components A and B.

The present disclosure provides an integration process that allows forthe co-integration of photonic active and passive devices andhigh-performance waveguide-integrated photodetectors, such ashigh-performance germanium waveguide-integrated photodetectors, on asingle silicon based photonics platform. The present disclosure furtherprovides an integration process that allows for the hybrid integrationof light sources, such as hybrid III-V/Si lasers, on a single siliconbased photonics platform.

In one aspect, an example method is disclosed that includes providing aplanarized silicon-based photonics substrate comprising a first siliconwaveguide structure and a second silicon waveguide structure.Thereafter, a dielectric layer may be deposited over the planarizedsilicon-based photonics substrate, and at least a portion of the firstsilicon waveguide structure may be exposed (e.g., by forming a trenchover the first silicon waveguide structure). The method further includesselectively etching the exposed portion of the first silicon waveguidestructure to form a template, using the first silicon waveguidestructure as a seed layer to selectively grow a germanium layer thatextends above the dielectric layer, and planarizing the germanium layerto form a planarized germanium layer, wherein the planarized germaniumlayer does not extend above the dielectric layer. The planarizedgermanium layer may, for example, have a thickness between about 250 nmand about 300 nm. In some embodiments, the planarized germanium layermay thereafter be doped (e.g., by implantation) and/or annealed.

In some embodiments, the template may be selected such that it allowsfabricating a thin germanium photodetector. The resulting germaniumphotodetector may, for example, exhibit high responsivity, a low darkcurrent, and a high speed. To this end, metal contacts to the germaniumphotodetector may be provided at a distance from the optically activeregion of the germanium photodetector. This is obtained by selecting atemplate that results in an ‘inverted rib’ germanium photodetector. As aresult of the template, the germanium layer may be patterned such thatit comprises an optically-active region (which may, for example, be 100nm to 500 nm thick, or even 250 nm to 300 nm thick) andlaterally-overhanging portions (which may, for example, be about 50 nmthick), resulting in an ‘inverted rib’ or ‘T’ shape. The metal contactsmay be provided on the laterally-overhanging portions. Thelaterally-overhanging portions may be thin in order to confine theoptical mode to the thicker optically-active region. In confining theoptical mode to the optically-active region, absorption losses at thecontacts may be limited.

In some embodiments, in order to additionally minimize the influence ofdefects in the first germanium layer grown on top of the first siliconwaveguide structure, a ‘laterally overgrown’ germaniumwaveguide-integrated photodetector may be provided over the secondsilicon waveguide structure. In these embodiments, the optically-activegermanium region may be formed by lateral overgrowth over the secondsilicon waveguide structure, with a thin (e.g., less than 100 nm)dielectric layer in between the laterally-overgrown germanium layer andthe second silicon waveguide structure. The optically-active region ofthe germanium layer may be at a predetermined lateral distance from theseed layer. In addition, the metal contacts may be provided at adistance from the optically active region to minimize absorption lossesat the metal contacts, as described above.

Each of the ‘inverted rib’ germanium structure and the ‘laterallyovergrown’ germanium structure described above may be formed byselective germanium growth seeded from silicon (of a silicon waveguidestructure) at the bottom of an oxide trench with an appropriate etchdepth and profile. As described above, the trench thereby forms atemplate for the germanium growth and an etched silicon waveguidestructure is used as a seed layer.

After integration of the germanium photodetectors, a planar structure isobtained. Thereafter, in some embodiments, III-V layers can be bonded tothis planar structure, e.g., for fabricating integrated III-V/siliconhybrid lasers. After laser processing, a common BEOL (Back-End Of Line)approach can be used to contact the lasers, germanium photodetectors,and silicon waveguide structures.

The disclosed methods fit within an existing framework or platform forsilicon photonics processing. The disclosed methods are complementarymetal-oxide-semiconductor (CMOS) compatible and allow obtaining goodgermanium photodetectors combined with the integration of III-V/Silasers. After the integration of the germanium photodetectors, a planartopology is obtained, with only a thin dielectric layer (e.g., with athickness less than 100 nm, or even less than 50 nm) on top of thesilicon waveguide structures. This allows subsequent integration ofhybrid III-V/Si lasers, which rely on a thin interfacial dielectriclayer between the silicon and the III-V layers to obtain optimum lasingperformance. In some embodiments, sharing of the contact module betweenall devices (lasers, germanium photodetectors, and silicon waveguidestructures) is enabled, potentially leading to a low cost process.

The method of the present disclosure is further described for anexemplary process flow, with a focus on the process steps for formingthe germanium photodetectors. However, the present disclosure is notlimited thereto. For example, in the different process steps othersuitable materials, other suitable process parameters (such astemperatures, process times, . . . ) and other suitable dimensions canbe used. Other devices than the ones illustrated can be integrated.

FIGS. 1-8 schematically illustrate process steps of an example method,in accordance with some embodiments. In particular, as shown in FIGS.1-8, a waveguide/grating coupler (FC), a raised grating coupler (RFC), agermanium-on-silicon photodetector (Ge-on-Si PD), a silicon MOSCAPmodulator, and a silicon diode modulator are integrated on asilicon-based photonics platform.

As shown in FIG. 1, a planarized silicon-based photonics substrate isprovided. In some embodiments, the substrate may comprise a siliconsubstrate, such as a silicon on insulator (SOI) substrate. The SOI wafermay include a buried oxide (BOX) layer 1. In some embodiments, the BOXlayer 1 may have a thickness of, for example, about 2000 nm. Further, insome embodiments, the BOX layer 1 may be lightly p-doped.

A number of silicon waveguide structures 2 may be formed on top of theBOX layer 1. The silicon waveguide structures 2 may, for example, beformed of a patterned silicon layer. The silicon waveguide structures 2may have a thickness of, for example, about 220 nm and, in someembodiments, may be selectively doped.

Additionally, oxide regions 3 may be formed between the siliconwaveguide structures 2. A gate oxide 4, a polycrystalline layer 5, andan oxide layer 6 may be formed on the silicon waveguide structures 2 andthe oxide regions 3 and may be planarized to achieve a planar surface.

In some embodiments, the example planarized silicon-based photonicssubstrate shown in FIG. 1 may be processed according to a typicalsilicon photonics platform, such as that described by D. Vermeulen etal. (“High-efficiency fiber-to-chip grating couplers realized using anadvanced CMOS-compatible Silicon-On-Insulator platform,” Optics Express,Vol. 18 No. 17, 16 Aug. 2010, pp 18278-18283.) The example planarizedsilicon-based photonics substrate may be processed in other manners aswell.

FIGS. 2-3 illustrate formation of a template 8 to be used in growing agermanium layer 9. As shown in FIG. 2, a trench 7 may be etched in theoxide layer 6, thereby exposing a portion of the polycrystalline layer5. Further, as shown in FIG. 3, the exposed portion of thepolycrystalline layer 5 may be etched (e.g., stopping on the gate oxide4). Further, the gate oxide 4 may be etched. In some embodiments, anyphotoresist (e.g., used for the patterning steps) may be removed afterthe polycrystalline layer 5 is etched and before the oxide layer 6 isetched, without exposing the patterned silicon layer 2. Still further, aportion of a silicon waveguide structure 2 may be etched (e.g., to adepth between about 70 nm and about 150 nm), thereby forming thetemplate 8. As shown, following the etches, a portion of the siliconwaveguide structure 2 may be exposed.

Once the template 8 is formed, the planarized silicon-based photonicssubstrate may be cleaned, followed by an HF dip and an in-situ H₂ bakeat 850° C. Then, an in-situ etch (e.g., an HCl vapor etch of about 50nm) of the silicon waveguide structure 2 may be performed in order tohave a good seed layer surface.

FIG. 4 illustrates the selective growth of a germanium layer 9 in thetemplate 8. As shown in FIG. 4, the exposed portion of the first siliconwaveguide structure 2 may be used as a seed layer for the selectivegrowth of the germanium layer 9. The germanium layer 9 may be formedwith a thickness on the order of, for example, about 1 μm to about 2 μm.In some embodiments, additional silicon epitaxial growth and/or in-situdoping may be performed.

Following the selective growth of the germanium layer 9, the germaniumlayer 9 may be annealed. The anneal may be, for example, a 3 minuteanneal at 850° C. in a nitrogen atmosphere. Other anneals are possibleas well. In general, the anneal may serve to reduce a number of defectsin the germanium layer 9.

As shown in FIG. 5, a chemical mechanical polish (CMP) may be used toplanarize the germanium layer 9, thereby forming a planarized germaniumlayer 10. The CMP may, for example, stop at the oxide layer 6. In someembodiments, in order to better control the CMP process, germanium-baseddummy structures or germanium dummies can be provided that level out thedensity of germanium over the substrate. These germanium dummies can,for example, be formed at the location of any silicon-based dummystructures used in the fabrication process of the planarizedsilicon-based photonics substrate shown in FIG. 1. For example, thegermanium dummies can be fabricated using the silicon-based dummystructures as a seed layer for germanium growth. Following the CMP, theplanarized germanium layer 10 may have a thickness between about 100 nmand about 500 nm, such as between about 250 nm and about 300 nm.

In FIG. 6, a cap layer 11 may be formed on the planarized germaniumlayer 10. The cap layer 11 may, for example, have a thickness of about20 nm. Further, the cap layer 11 may be formed of, for example,Si_(0.50)Ge_(0.50) cap 11. The cap layer 11 may, for example, be formedselectively with respect to the oxide layer 6. Further, the cap layer 11may enable (in a later process step) a collective silicidation with thesilicon devices.

FIG. 7 illustrates the growth of an oxide liner 12. The oxide liner 12may, for example, be formed using plasma-enhanced chemical vapordeposition (PECVD). Further, the oxide liner 12 may, for example, have athickness less than 100 nm, less than 50 nm, or even less than about 30nm. Thereafter, as shown in FIG. 8, dopants 13 may be implanted in theplanarized germanium layer 10. The dopants may be, for example, n+dopants, such as phosphorous, and/or p+ dopants, such as boron. Otherdopants 13 are possible as well. After the dopants 13 are implanted inthe planarized germanium layer 10, an activation anneal may beperformed, thereby forming a germanium photodetector structure (e.g.,the vertical p-i-n structure in the example shown in FIG. 8). As shownin FIG. 8, the germanium photodetector structure has an ‘inverted rib’structure. A transmission electron microscopy (TEM) image showing across-section of such an ‘inverted rib’ structure is shown in FIG. 10.

At this stage of the process, a planar structure comprising siliconwaveguide structures and an integrated germanium photodetector isobtained. The oxide liner 12 may be thin (e.g., less than 100 nm thick),allowing further integration of, for example, III-V/Si hybrid laserswith good coupling to the underlying silicon photonics structures.

Integration of a III-V device is schematically illustrated in FIG. 9. Asshown in FIG. 9, an integrated III-V layer 14 may be formed that allowsgood optical coupling to an underlying silicon waveguide structure 16.Further process steps, after bonding of the III-V layer, are mainlyrelated to laser processing and forming contacts and interconnects. Insome embodiments, a single contact module can be used for forming thecontacts to the silicon devices, germanium photodetectors, and hybridlasers. As shown in FIG. 9, the planarized germanium layer 10 has an‘inverted rib’ structure comprising thin laterally overhanging elementson which metal contacts 15 may be provided.

This is also illustrated in FIGS. 11A-C for different electrical designvariants of the germanium photodetector. In particular, FIG. 11Aillustrates a vertical p-i-n structure, FIG. 11B illustrates a lateralp-i-n structure, and FIG. 11C illustrates a lateralMetal-Semiconductor-Metal structure. As shown, the metal contacts areprovided on the thin laterally overhanging parts of the germaniumstructure, away from the optically active region such that opticallosses at the metal contacts are strongly reduced, leading to a highresponsivity of the germanium photodetector.

FIGS. 12A-B show results of simulations performed for a typicalgermanium waveguide-integrated photodetector with a metal contact on topof the optically active region of the germanium photodetector and for an‘inverted rib’ germanium photodetector, such as that described above.Simulations were performed at a wavelength of 1.5 micrometer, assuming agermanium waveguide that is 1 micrometer wide and 0.21 micrometer thick.The simulations revealed that in the case of an ‘inverted rib’ germaniumphotodetector the absorption coefficient of the optical mode is about4400/cm and that absorption mainly occurs in the germanium, leading to amaximum quantum efficiency approaching 100%. In case of the typicalgermanium photodetector, the simulation shows that the absorptioncoefficient of the optical mode is about 7400/cm, of which about 3000/cmis related to absorption in the metal, resulting in a maximum quantumefficiency of less than 60%.

FIGS. 13A-H schematically illustrate a fabrication process for formingan ‘inverted rib’ germanium photodetector and a ‘laterally overgrown’germanium photodetector. As shown in FIG. 13A, a planarizedsilicon-based photonics substrate is provided. To this end, a siliconsubstrate may be provided that includes a stack of a silicon substrateand an insulator layer 1. In some embodiments, the silicon substratemay, for example, have a thickness of about 220 nm of silicon, and theinsulator layer may, for example, be a buried oxide (BOX) layer and may,for example, have a thickness of about 2 μm. Further, as shown, siliconwaveguide structures 2, including a first silicon waveguide structureand a second silicon waveguide structure, a gate oxide 4, and apolycrystalline layer 5 are formed on the silicon substrate and theinsulator layer 1. In some embodiments, the gate oxide 4 may have athickness of about 5 nm. Further, in some embodiments, thepolycrystalline layer 5 may have a thickness of about 160 nm. Four orfive levels of patterning have typically been performed, comprising forinstance lithography and/or etching of polycrystalline silicon/siliconetching, to define advanced optical features or structures in thesilicon. In some embodiments, an oxide may be deposited and planarized,for instance by CMP. This CMP step can be stopped at a SiN layer on topof the patterned polycrystalline silicon. In some embodiments, dummypolycrystalline silicon structures covered with SiN may be providedacross the substrate to level out the density of polycrystalline siliconstructures across the wafer, thus allowing good CMP process control.After the CMP, the SiN layer may be removed and the oxide in between theSiN structures may be etched back to form a planar surface. Thereafter,an oxide layer 6 may be deposited on the entire surface. The oxide layer6 may, for example, have a thickness of about 150 nm. The resultingplanarized silicon-based photonics substrate may be similar to thatshown in FIG. 1.

FIG. 13A shows a stage of the process just before a template in theoxide layer 6 is formed. As shown in FIG. 13A, a patterned resist layer21 is patterned. The patterned resist layer 21 may be used along with,for example, lithography techniques to define the template.

As shown in FIG. 13B, trenches 7 may be etched through the oxide layer6, thereby exposing two portions of the underlying polycrystalline layer5. In some embodiments, a timed oxide etch may be used to form thetrenches 7, in which the etch time determines remaining thickness theoxide 6 top of the silicon waveguide structures 2. In the example shown,the trench 7 at the left is shaped to realize an ‘inverted rib’germanium photodetector structure over a first silicon waveguidestructure 2, while the trench 7 at the right is shaped to realize a‘laterally overgrown’ germanium photodetector structure over a secondsilicon waveguide structure 2.

As shown in FIG. 13C, the portions of the polycrystalline layer 5 areetched through (e.g., stopping at the gate oxide 4), resulting in twostep-like templates in the gate oxide 4 over the underlying siliconwaveguide structures 2. After stripping the resist layer, as shown inFIG. 13D, the gate oxide 4 may be selectively etched, as shown in FIG.13E, followed by in-situ cleaning and optional etching into the siliconwaveguide structures 2 (e.g., to a depth in the range between about 70nm and about 150 nm), as shown in FIG. 13F. As a result, a firsttemplate 8 having an inverted rib shape may be formed over the firstsilicon waveguide structure, while a second template 8 having alaterally overgrown shape may be formed over the second siliconwaveguide structure.

Thereafter, a germanium layer 9 may be selectively grown using theexposed silicon waveguide structures 2 as a seed layer and using thestep-shaped trenches in the oxide layer 6 as a template, as shown inFIG. 13G. In particular, a first germanium layer 9 may be grown usingthe first silicon waveguide structure as a seed layer, and a secondgermanium layer 9 may be grown using the second silicon waveguidestructure as a seed layer.

The germanium layer 9 may have a thickness between, for example, about0.5 μm and about 5 μm. In some embodiments, the germanium layer 9 may beannealed to remove dislocation defects. Thereafter, a CMP may beperformed on the germanium layer 9 to produce a planarized germaniumlayer 10, as shown in FIG. 13H. The planarized germanium layer 10 mayhave a thickness between, for example, about 100 nm and about 500 nm,such as about 300 nm.

As shown, both an ‘inverted rib’ structure (left) and a ‘laterallyovergrown’ structure (right) are obtained. The CMP process controlrequires equal density of germanium islands across the wafer, which, insome embodiments, can be obtained by providing germanium dummystructures across the wafer.

A single, common back-end-of-line (BEOL) contacting process or strategycan be performed for germanium devices and silicon optical devices onthe same substrate. As an example, FIG. 14 illustrates two differentdevice configurations that may be used for the ‘laterally overgrown’germanium waveguide-integrated photodetector. Other deviceconfigurations are possible as well.

FIGS. 15-16 illustrate experimental results comparing a typicalgermanium waveguide-integrated photodetector (FIG. 15) with thedisclosed germanium waveguide-integrated photodetector (FIG. 16), inaccordance with some embodiments. The experimental results are for awavelength of 1.5 micrometer. The final thickness of the germanium layerwas about 200 nm. Results are shown for devices with 10 micrometerlength (L10) and for different widths (W=1.4 micron, 2 micron, 3 micronand 1 micron, 2 micron respectively).

From the experimental results, it can be concluded that, for the samedevice size, a clearly better responsivity is obtained for the disclosedinverted rib structure than for the typical germanium photodetector. Itcan also be concluded that the responsivity is much less influenced bydevice width in the case of an inverted rib structure, as compared tothe typical germanium photodetector.

Other variations to the disclosed embodiments can be understood andeffected by those skilled in the art in practicing the claimedinvention, from a study of the drawings, the disclosure and the appendedclaims. In the claims, the word “comprising” does not exclude otherelements or steps, and the indefinite article “a” or “an” does notexclude a plurality. The mere fact that certain measures are recited inmutually different dependent claims does not indicate that a combinationof these measures cannot be used to advantage. Any reference signs inthe claims should not be construed as limiting the scope.

The foregoing description details certain embodiments of the invention.It will be appreciated, however, that no matter how detailed theforegoing appears in text, the invention may be practiced in many ways.It should be noted that the use of particular terminology whendescribing certain features or aspects of the invention should not betaken to imply that the terminology is being re-defined herein to berestricted to include any specific characteristics of the features oraspects of the invention with which that terminology is associated.

1. A method comprising: providing a planarized silicon-based photonicssubstrate comprising a silicon waveguide structure; depositing adielectric layer over the planarized silicon-based photonics substrate;selectively etching the dielectric layer, thereby exposing at least aportion of the silicon waveguide structure; selectively etching theexposed portion of the silicon waveguide structure to form a template;using the silicon waveguide structure as a seed layer to selectivelygrow in the template a germanium layer that extends above the dielectriclayer; and planarizing the germanium layer to form a planarizedgermanium layer, wherein the planarized germanium layer does not extendabove the dielectric layer.
 2. The method of claim 1, wherein thedielectric layer comprises an oxide layer.
 3. The method of claim 2,wherein the oxide layer comprises a SiO₂ layer.
 4. The method of claim1, further comprising, before planarizing the germanium layer, annealingthe germanium layer.
 5. The method of claim 1, wherein the planarizedgermanium layer has a thickness between about 100 nm and about 500 nm.6. The method of claim 1, wherein planarizing the germanium layercomprises using a chemical mechanical polish to planarize the germaniumlayer.
 7. The method of claim 1, wherein, as a result of the template,the planarized germanium layer has an inverted rib shape.
 8. The methodof claim 7, further comprising: forming a germanium photodetectorstructure comprising the planarized germanium layer.
 9. The method ofclaim 8, wherein the inverted rib shape comprises an optically-activeregion and laterally-overhanging portions on either side of theoptically-active region.
 10. The method of claim 9, wherein theoptically-active region has a thickness between about 250 nm and about300 nm.
 11. The method of claim 9, further comprising providing metalcontacts in electrical contact with the laterally-overhanging portionsand at least 50 nm from the optically-active region.
 12. A methodcomprising: providing a planarized silicon-based photonics substratecomprising a first silicon waveguide structure and a second siliconwaveguide structure; depositing a dielectric layer over the planarizedsilicon-based photonics substrate; selectively etching the dielectriclayer, thereby exposing at least a portion of the first siliconwaveguide structure and at least a portion of the second siliconwaveguide structure; selectively etching the exposed portion of thefirst silicon waveguide structure to form a first template; selectivelyetching the exposed portion of the second silicon waveguide structure toform a second template; using the first silicon waveguide structure as afirst seed layer to selectively grow in the first template a firstgermanium layer that extends above the dielectric layer; planarizing thefirst germanium layer to form a first planarized germanium layer,wherein the first planarized germanium layer does not extend above thedielectric layer; using the second silicon waveguide structure as a seedlayer to selectively grow in the second template a second germaniumlayer that extends above the dielectric layer; and planarizing thesecond germanium layer to form a second planarized germanium layer,wherein the planarized germanium layer does not extend above thedielectric layer.
 13. The method of claim 12, wherein: as a result ofthe first template, the first planarized germanium layer has an invertedrib shape; and as a result of the second template, the second planarizedgermanium layer has a laterally overgrown shape.
 14. The method of claim13, further comprising: forming a first germanium photodetectorstructure comprising the first planarized germanium layer; forming asecond germanium photodetector structure comprising the secondplanarized germanium layer.
 15. The method of claim 14, wherein theinverted rib shape comprises an optically-active region andlaterally-overhanging portions on either side of the optically-activeregion.
 16. The method of claim 14, wherein the laterally overgrownshape comprises an optically-active region and a laterally-overhangingportion on one side of the optically-active region, wherein thelaterally-overhanging portion is laterally disposed from the secondsilicon waveguide structure by at least about 300 nm.
 17. The method ofclaim 14, further comprising, in a single processing step, formingcontacts to the first silicon waveguide structure, the second siliconwaveguide structure, the first germanium photodetector structure, andthe second germanium photodetector structure.
 18. A method comprising:providing a planarized silicon-based photonics substrate comprising afirst silicon waveguide structure and a second silicon waveguidestructure; depositing a dielectric layer over the planarizedsilicon-based photonics substrate; selectively etching the dielectriclayer, thereby exposing at least a portion of the first siliconwaveguide structure; selectively etching the exposed portion of thefirst silicon waveguide structure to form a template; using the firstsilicon waveguide structure as a seed layer to selectively grow in thetemplate a germanium layer that extends above the dielectric layer;planarizing the germanium layer to form a planarized germanium layer,wherein the planarized germanium layer does not extend above thedielectric layer; forming a germanium photodetector structure comprisingthe first planarized germanium layer; bonding a III-V layer to thedielectric layer at a distance of less than about 100 nm from the secondsilicon waveguide structure; and integrating a hybrid laser structurewith the planarized silicon-based photonics substrate, wherein thehybrid laser structure comprises the III-V layer.
 19. The method ofclaim 18, wherein as a result of the first template, the firstplanarized germanium layer has an inverted rib shape.
 20. The method ofclaim 18, further comprising, in a single processing step, formingcontacts to the first silicon waveguide structure, the second siliconwaveguide structure, the germanium photodetector structure, and thehybrid laser structure.